1. Field of the Invention
This invention pertains to a high gain, high speed rail-to-rail amplifier, and more particularly to a high gain, high speed rail-to-rail amplifier that has two symmetrical input stages to provide amplification of input signals at the upper and lower ends of the input voltage range and to provide increased amplification of input signals in the middle voltage range. The high gain, high speed rail-to-rail amplifier of this invention is designed to be used in a variety of applications including scanners and other imaging devices.
2. Description of the Related Art
A conventional folded, cascode amplifier comprised of MOS transistors is shown in FIG. 1. This amplifier 11 employs a single cascoded input stage comprised of two input transistors M1 and M2 which have their substrates coupled to supply voltage V.sub.DD. Input signals V.sub.1 and V.sub.2 (the difference of which represents a differential input signal .upsilon..sub.IN) are applied to the gates of M1 and M2 respectively. Current source transistor M7 is biased by voltage V.sub.BP1 and generates a current, which is supplied to input transistors M1 and M2.
Currents are drawn from the sources of input transistors M1 and M2 and are combined with currents drawn from the drains of transistors M3 and M4 which form part of the cascoded input stage and also act to amplify the input voltage signal. M3 and M4, which have their substrates coupled to supply voltage V.sub.SS, have a common-gate connection to which a bias voltage V.sub.BP2 is applied. Transistors M5 and M6 form a current mirror that acts as a load for M3 and M4.
Transistors M3 and M4 are provided with current source transistors M10 and M11, each of which forms a current mirror with transistor M14. As a result of this connection, the current generated in the branch containing M12, M13 and M14 is induced in M10 and M11 to provide current for M3 and M4. Voltages V.sub.BP1 and V.sub.1 are applied to the gates of M12 and M13 respectively to generate the current in the M12, M13, M14 branch.
The output stage, which is coupled to the cascoded input stage through a capacitor C.sub.C, includes transistor M8, the gate of which is driven by the voltage at the drain-drain connection between transistors M4 and M6. A single-ended voltage output .upsilon..sub.o is taken off of the common drain connection between M8 and a current source transistor M9 which is biased by voltage V.sub.BN to generate current for the output stage.
One problem with the type of conventional amplifier shown in FIG. 1 is that the single input stage is configured so that the magnitude of the differential input voltage signal .upsilon..sub.IN must be larger than V.sub.T (approx. 0.7 V) to turn the amplifier on. Thus, amplifier 11 is unable to provide any amplification of differential signals below this threshold.
Another problem with amplifier 11 is that it is unable to provide a full range output because of the configuration of the current source in the output stage. Having limited input and output ranges, amplifier 11 generates an output signal .upsilon..sub.o that does not follow .upsilon..sub.IN well at the low and high ends of the input range when amplifier 11 is used as a voltage follower. This ultimately leads to large distortion in the digital output signal produced by the scanner when amplifier 11 is employed in connection with an analog-to-digital converter in the scanner circuitry.